The upcoming Intel Sapphire Rapids, expected to succeed the Ice Lake CPUs, are apparently based on the new MCM (Multi-Chip Module) design. These new CPUs will support the next generation of computer memory, as well as PCIe 5.0, claims a massive new leak about these processors that will work primarily in the Data Centers of web companies.
— Wccftech (@wccftech) October 7, 2020
Intel Sapphire Rapids CPUs Specifications And Features:
Intel confirmed the launch of its upcoming Sapphire Rapids CPU at its Architecture Day 2020. The next generation of CPUs will feature support for DDR5 memory and PCIe 5.0. Intel insists these new chips indeed are a “next-generation” data center chip with the addition of the CXL 1.1 interconnect. It is important to note that Intel might alter some features and the platforms that the CPUs support. According to the latest leak, these server-grade next-gen Intel processors would be manufactured on the 10nm+++ SuperFin Enhanced process. Incidentally, the currently available Ice Lake CPUs are manufactured on the standard 10nm Fabrication Node.
— Jim (@AdoredTV) October 6, 2020 Additionally, the new CPUs use TME, which stands for Total Memory Encryption. TME is an architectural design that encrypts the memory completely. This means even raw RAM data dumps would be useless as the data would be completely encrypted. Even the Intel Tiger Lake CPUs, which are manufactured on the 10nm standard Fabrication Node, have the TME feature.
Coming to the MCM design, the Intel Sapphire Rapids will reportedly feature 4 CPU tiles with 14 cores each. The 56 Cores in a CPU seem rather odd, and this is because rumors indicate a single core in each tile would be intentionally disabled. If the yield per silicon wafer improves, the Intel Sapphire Rapids CPUs would feature a total of 60 Cores or perhaps even more. The Intel Sapphire Rapids CPUs would pack cores based on the Golden Cove architecture, which should offer a massive boost in IPC.
— MebiuW (@MebiuW) October 3, 2020 The Intel Sapphire Rapids CPUs will reportedly pack 4 HBM2 stacks with a maximum memory of 64 GB, which translates to 16 GB per stack. Since it is DDR5 RAM, companies that buy these CPUs can expect the total bandwidth to hit 1 TB/s. Incidentally, DDR5 RAM can hit a frequency of 4800 MHz. According to the leak, HBM2 and GDDR5 will be able to work together in a flat, caching/2LM, and hybrid modes. Experts claim the reduced distance between the CPU and the DDR5 RAM would be quite beneficial for certain workloads. Buyers can expect the upcoming Intel server-grade CPUs to have 80 PCIe 5.0 lanes on the top-end or flagship CPUs, and up to 64 lanes on the rest of the SKUs. These would be divided by 8 channels per CPU. The entire Intel Sapphire Rapids CPU would sport a rather high 400W TDP Profile.
